| Immediate Job Opening for Design Verification engineer at Remote, Remote, USA |
| Email: [email protected] |
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Hello, My Name is Kushal Raghuvanshi, a technical recruiter with CBL Solutions. We are looking for a suitable candidate for the position Design Verification engineer if you can provide the best time and number to reach you to Discuss this further. Position: Design Verification engineer Location: Remote Job Summary: We are seeking a highly skilled Verification Engineer with a minimum of 5 years of experience in the verification domain. The ideal candidate must have hands-on experience with System Verilog and UVM , and a solid understanding of the complete verification life cycle. The role requires expertise in SOC Integration and SOC verification, along with protocol experience in HBI, HBM, UCIe, PCIe, Ethernet, LPDDR5, and DFT. Key Responsibilities: Develop and execute verification plans, test benches, and test cases to ensure high-quality deliverables. Implement and utilize System Verilog and UVM for verification processes. Conduct thorough verification throughout the verification life cycle, from test plan creation to coverage closure. Perform SOC Integration and SOC verification, ensuring seamless protocol implementation and validation. Collaborate with design and development teams to identify and resolve verification issues. Analyze and debug test failures, identifying root causes and implementing corrective actions. Utilize protocol experience in HBI, HBM, UCIe, PCIe, Ethernet, LPDDR5, and DFT to ensure robust verification coverage. Maintain detailed documentation of verification processes, methodologies, and results. -- Kushal Raghuvanshi Technical Recruiter Kushal @cblsolutions.com| Cerebral Technologies, Inc (D.B.A CBL Solutions) | http://cblsolutions.com/ 400 E Royal Lane, Ste 235, Irving, TX - 75039 -- Keywords: information technology Texas Immediate Job Opening for Design Verification engineer [email protected] |
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| 11:41 PM 08-Jul-24 |