| DFT (Design for testability)- 100% Remote - USA at Remote, Remote, USA |
| Email: [email protected] |
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From: James Smith, Yochana Solutions INC [email protected] Reply to: [email protected] Job Title- DFT (Design for testability) Location 100% Remote - USA Duration 1+year Role Description: Contribute to micro-architecture specification for SoC design block Participated in 2-3 SoC projects Participate in SoC Chip Architecture specification reviews Must have extensive experience in Micro-architecture design for SoC sub-blocks Interact with SoC integration, verification, and physical design teams and also with IP vendors Extensive experience in SoC RTL coding (Verilog or System-Verilog). Experience in RTL Code Linting and CDC checks. Experience in RTL integration using Industry standard tools, is an added advantage Handle complete responsibility of an entire block starting from Micro-architecture specifications, RTL implementation, Linting, CDC, Synthesis/STA Experience in low power design techniques Good understanding of DFx design techniques Good appreciation of AXI/AHB bus protocol, GigBE, USB, NAND Flash Technology, PCIe Gen2/3 Host interface, DDR2/3 memory interfaces etc. Experience in PCIe, HBM memory protocol is Preferred Thanks & Regards James Smith Team Lead [email protected] Yochana Solutions INC Windsor, Ontario- Canada Farmington hills, MI-48335- USA USA | CANADA I INDIA Direct No: 949-201-1313 W: www.yochana.com Please follow us on : USA | CANADA | INDIA Join the Referral Revolution of Yochana by Sharing, Earning, and Empowering! Ask us about our rewarding referral program. Note: This is not an unsolicited mail. If you are not interested in receiving our e-mails then please reply with subject line Remove Keywords: Michigan DFT (Design for testability)- 100% Remote - USA [email protected] |
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| 10:13 PM 09-Jul-24 |