Post Silicon Validation Engineer Ethernet at Santa Clara, California, USA |
Email: [email protected] |
| From: Prabhat, VYZEINC [email protected] Reply to: [email protected] Job Description - Need locals Role: Post Silicon Validation Engineer Ethernet Location: Santa Clara, CA 1 round of interview Need locals, Duties/Position Overview: Works for ethernet validation. Hardware verification, checks the actual devices/chips. Brings up ethernet traffic, running generators like Spirent etc., Have to go to the lab and runs some tests Validates the functionalities of the chip They are executing Test plans Candidate should be able to run the tests cases, pumping traffic at a certain speed, confirming the traffic speed etc., Required Skills: At least 7-8 years of Post-Silicon validation experience is required. Strong experience in Ethernet Validation OR at least should be able to understand ethernet standards/protocols, debugging etc., Python/C Scripting is required. Strong ability to understand functional validation. Should be able to run the traffic, run generators like Spirent etc., Bachelors is highly preferred. ITS NOT an electrical validation role Top skills understanding basic validation, scripting, ethernet protocols Duties: | Develop and run post-silicon validation tests and associated scripts for successfully validating Ethernet network interfaces (PHY / PCS / MAC). Analyze and debug test failures independently to identify root cause. Debug complex cross-functional issues with ASIC, system hardware, and software engineers. Build powerful programs in Python and C to automate testing, regression, and debugging. | Skills: | 5+ years of relevant post-silicon validation experience. Proficiency with lab equipment, logic analyzers, and oscilloscopes. Expertise in Python and C. Thorough understanding of Ethernet PHY / PCS / MAC standards (e.g. IEEE 802.3) and technologies. Proven success in functional and electrical bringup and validation of PAM4 and NRZ Ethernet interfaces on multiple ASICs. Hands-on experience with traffic generators such as Spirent and Ixia Demonstrated ownership and independence in planning, analyzing, debugging, driving vendors, and reporting status. Strong collaboration and communication skills. | Education: | BS or MS in EE, CE, or CS or equivalent experience. | Keywords: cprogramm golang container edition microsoft California Post Silicon Validation Engineer Ethernet [email protected] |
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06:05 AM 31-Jan-25 |