| Python with IEEE JTAG Architect - Redmond, WA at Redmond, Washington, USA |
| Email: [email protected] |
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Hi, Please go through below job role and do let me know if you want to submit your candidature. Python with IEEE JTAG Architect - Redmond, WA The purpose of this team is custom circuit design. This role will contribute to working in a lab to help plan and execute an electrical characterization of a small ASIC containing various IP blocks. Responsibilities would include preparing for Silicon arrival, setting up bench characterization stations, scripting work to automate testing, interfacing with design engineers to implement various characterization plans, perform testing in the lab, gather data and format it for review by design team. Key Responsibilities: Prepare for Silicon arrival and set up bench characterization stations. Develop software infrastructure to automate control of various lab equipment remotely. Set up bench characterization stations with evaluation boards and various lab equipment. Interpret IP-level characterization plans and develop a series of tests to implement those plans. Perform testing in the lab, gather and format data, and publish for review by the design team. Interface with design engineers to implement various characterization plans. Qualifications: Minimum 5 years of experience with bench post-silicon validation. Minimum 5 years of experience with IEEE JTAG & JTAG standards. Minimum 5 years of experience with Python. Basic knowledge of high-speed digital/mixed signal circuits. Experience using Python and TCL scripting languages. Knowledge of how to set up and operate lab equipment. Strong knowledge of IEEE and its use in testing circuits. Lab technician skills like soldering and simple board modification and repair are a plus. Knowledge of Siemens Tessent DFT tools is a plus. Electrical Engineering degree is required. -- Keywords: information technology golang Washington Python with IEEE JTAG Architect - Redmond, WA [email protected] |
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| 10:48 PM 21-Feb-25 |