| Senior Design Verification Engineer || Santa Clara, CA or Austin, Texas or Boston, MA or Toronto, ON - Canada | Hybrid at Santa Clara, California, USA |
| Email: [email protected] |
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From: Roopesh Sharma, VIZON INC [email protected] Reply to: [email protected] Hello, Hope you are doing great. Please response me on my official email - [email protected] Please ensure that the resume does not exceed 5 pages. Job Title: Senior Design Verification Engineer Location: Santa Clara, CA / Austin, Texas / Boston, MA / Toronto, ON Canada || local required Must have LinkedIn. Required: Degree in Electrical Engineering, Computer Engineering, or similar. Python, CocoDB, PyUVM, experience is required. Experience with randomized testing strategies is a hard requirement. Solid experience as a Design Verification Engineer, focused on complex digital designs. Expertise of digital design concepts, including RTL, synthesis, & timing constraints. Solid in verification methodologies like UVM (Universal Verification Methodology), SystemVerilog, etc. Experience developing/executing verification plans, testbenches, & test cases for digital designs. Understanding of functional coverage, assertion-based verification, & code coverage analysis. Proficiency with scripting/programming in languages such as Python, Perl, or C/C++. Familiar with standard EDA tools & simulation environments. Pluses: Emulator experience. Looking for a Senior Design Verification Engineer. This person will play a key role in quality and reliability of digital designs through comprehensive verification methodologies. This person should have a strong background in verification techniques/processes, problem solving skills, and skilled at delivering high quality designs. Scope: Develop & execute comprehensive verification strategies in order to validate complex digital designs, ensuring compliance with specifications/standards. Work with design teams to understand design reqs & contribute to the creation of verification plans & test benches. Write/execute test cases in order to verify functionality, performance, & power aspects of the design. Perform functional & formal verification in order to identify & debug design issues & ensure correct design behavior. Develop/maintain verification infrastructure, methodologies, & best practices to improve efficiency and productivity. Support in the adoption of advanced verification methodologies, tools, & techniques to enhance the overall verification process. Mentor & provide guidance to Jr verification engineers, sharing expertise & best practices. Work with cross-functional teams to analyze & resolve system-level issues & ensure seamless integration of the design. Keep up to date with the latest industry trends, emerging technologies, & verification methodologies to drive innovation and continuous improvement. How would you randomize tests for a local L1 cache How to randomize interactions with amba or AXI bus Have you worked with CocoDB. Keywords: cprogramm cplusplus California Massachusetts Senior Design Verification Engineer || Santa Clara, CA or Austin, Texas or Boston, MA or Toronto, ON - Canada | Hybrid [email protected] |
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| 12:30 AM 08-Mar-25 |