| Contract :: ASIC Design engineer :: Santa Clara, CA(Onsite) at Remote, Remote, USA |
| Email: sahil.khan@tanishasystems.com |
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From: sahil khan, Tanisha Systems sahil.khan@tanishasystems.com Reply to: sahil.khan@tanishasystems.com Hi I am Sahil khan, A technical recruiter associated with Tanisha Systems Inc. I have an urgent opportunity mentioned below. If you find yourself comfortable with the job description. Please reply with your most recent resume and I will get back to you. Job Title: ASIC Design engineer Location: Santa Clara, CA(Onsite) Job Type: Fulltime/Contract Description Lead the design and development of advanced semiconductor electronics and ASICs, ensuring high performance and reliability. Develop and optimize mixed-signal designs, balancing analog and digital circuit requirements. Oversee semiconductor processing and advanced packaging technologies to enhance device performance and manufacturability. Integrate High Bandwidth Memory (HBM) and Low Power Double Data Rate (LPDDR) memory into system designs for improved efficiency and speed. Implement chiplet integration techniques, focusing on high-speed chiplet I/O and interconnects. Ensure signal integrity and power integrity throughout the design and development process. Automate chip layout generation and format conversion to streamline design workflows. Design printed circuit boards (PCBs) with a focus on performance, reliability, and manufacturability. Conduct thermal simulations to optimize thermal management and ensure device reliability under various operating conditions. Collaborate with cross-functional teams to ensure seamless integration and timely delivery of projects. Mentor and guide junior engineers, fostering a culture of continuous learning and innovation. Requirements M.S in Electrical Engineering, Computer Engineering, or a related field. Extensive experience in advanced semiconductor electronics and ASIC design. Proficiency in mixed-signal design and semiconductor processing techniques. Strong knowledge of advanced packaging technologies, including HBM and LPDDR integration. Experience with chiplet integration, high-speed chiplet I/O, and interconnects. Expertise in signal integrity, power integrity, and automated chip layout generation. Proven track record in PCB design and thermal simulations. Published works or patents in semiconductor technologies are highly desirable. Excellent leadership, communication, and project management skills. Ability to work collaboratively in a fast-paced and dynamic environment. Preferred Qualifications Ph.D. in a relevant field. Experience with leading industry-standard design and simulation tools. Published works or patents in semiconductor technologies. Excellent leadership, communication, and project management skills. Best Regards, | | Sahil Khan Sr. Engineering Recruiter Tanisha Systems Inc. Phone: 732-375-0038 Email: sahil.khan@tanishasystems.com Web: www.tanishasystems.com Ext: 626 | Keywords: access management California Contract :: ASIC Design engineer :: Santa Clara, CA(Onsite) sahil.khan@tanishasystems.com |
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| 04:44 AM 04-Apr-25 |