| NEED Design Verification Engineer - TX/CA Locals Only at Remote, Remote, USA |
| Email: [email protected] |
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http://bit.ly/4ey8w48 https://jobs.nvoids.com/job_details.jsp?id=2336104&uid= Hi All, Hope you are doing good. Currently we are looking for Design Verification Engineer with 7+ Years of experience and Local to TX/CA (DL Mandatory -No utility Bills). Please share your resume with the LinkedIn profile and Current Location with DL to [email protected] Experience: Looking for candidates with 7+ years of experience Pay Rate: $75/hour on W2/C2C Visa: No visa restrictions H1B transfers are welcome - No OPT/CPTs Location: Austin, TX / Sunnyvale, CA 100% Onsite Type: Contract to Hire Title: Design Verification Engineer Location: Austin, TX / Sunnyvale, CA - Onsite Responsibilities Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification Develop functional tests based on the verification test plan Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage Debug, root cause, and resolve functional failures in the design, partnering with the Design team Collaborate with cross-functional teams like Design, Model, Emulation, and Silicon validation teams towards ensuring the highest design quality Minimum Qualifications B.S or M.S degree in Electrical Engineering, Computer Engineering or Computer Science Hands-on experience in Verilog, System Verilog, C/C++ based verification, and UVM methodology Experience in IP/sub-system and/or SoC level verification based on System Verilog UVM/OVM based methodologies Experience in EDA tools and scripting (Python, Perl, ) used to build tools and flows for verification environments. Experience in architecting and implementing Design Verification infrastructure and executing the complete verification cycle Preferred Qualifications Experience in the development of UVM based verification environments from scratch Experience with Design verification of Data-center applications like Video, AI/ML, and Networking designs Experience with revision control systems like Mercurial(Hg), Git or SVN Experience with verification of ARM/RISC-V based sub-systems or SoCs With Regards, [email protected] -- Keywords: cprogramm cplusplus artificial intelligence machine learning information technology wtwo California Texas NEED Design Verification Engineer - TX/CA Locals Only [email protected] http://bit.ly/4ey8w48 https://jobs.nvoids.com/job_details.jsp?id=2336104&uid= |
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| 07:37 PM 11-Apr-25 |